[PATCH v2 1/2] ath10k: Bypass PLL setting on target init for QCA9888

Rajkumar rmanohar at qti.qualcomm.com
Mon Feb 16 23:11:29 PST 2015

On Mon, Feb 09, 2015 at 11:16:53AM +0530, Rajkumar Manoharan wrote:
> Some of of qca988x solutions are having global reset issue
> during target initialization. Bypassing PLL setting before
> downloading firmware and letting the SoC run on REF_CLK is fixing
> the problem. Corresponding firmware change is also needed to set
> the clock source once the target is initialized. Since 10.2.4
> firmware is having this ROM patch, applying skip_clock_init only
> for 10.2.4 firmware versions.
> Signed-off-by: Rajkumar Manoharan <rmanohar at qti.qualcomm.com>
> ---
>  drivers/net/wireless/ath/ath10k/core.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)

Its been pending for a while. Shall I resend this series?


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