[PATCH v2 3/3] ath10k: make target endianess more explicit

Kalle Valo kvalo at qca.qualcomm.com
Wed Aug 27 00:26:24 PDT 2014


Michal Kazior <michal.kazior at tieto.com> writes:

> Some copy engine structures are target specific
> and are uploaded to the device during
> init/configuration.
>
> This also cleans up a bit diag_mem_read/write
> implicit byteswap mess leaving only
> diag_access_read/write with an implicit endianess
> byteswap.
>
> Signed-off-by: Michal Kazior <michal.kazior at tieto.com>

[...]

>  static int ath10k_pci_diag_read32(struct ath10k *ar, u32 address, u32 *value)
>  {
> -	return ath10k_pci_diag_read_mem(ar, address, value, sizeof(u32));
> +	__le32 val = 0;
> +	int ret;
> +
> +	ret = ath10k_pci_diag_read_mem(ar, address, &val, sizeof(__le32));
> +	*value = __le32_to_cpu(val);
> +
> +	return ret;
>  }

For consistency, I folded a patch below. Is that ok?

--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -620,7 +620,7 @@ static int ath10k_pci_diag_read32(struct ath10k *ar, u32 address, u32 *value)
        __le32 val = 0;
        int ret;
 
-       ret = ath10k_pci_diag_read_mem(ar, address, &val, sizeof(__le32));
+       ret = ath10k_pci_diag_read_mem(ar, address, &val, sizeof(val));
        *value = __le32_to_cpu(val);
 
        return ret;

https://github.com/kvalo/ath/commit/1850a415873cb34a6f84b699dfb9a283df3252ec

-- 
Kalle Valo



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